1. Technical Field
The present invention relates to a semiconductor device, and more particularly, to a semiconductor memory device that provides varying refresh periods to its memory cells in accordance with a data retention capability of the memory cells.
2. Discussion of Related Art
A semiconductor device typically includes a semiconductor memory device such as a DRAM for storing data. In a DRAM memory cell, data is stored as electrons in a capacitor. However, data may be lost due to a leakage current of the capacitor. To prevent the loss of data due to a leakage current, a refresh operation is performed in the DRAM memory cell.
FIG. 1 illustrates a refresh operation in a DRAM memory cell of a conventional semiconductor device. Referring to FIG. 1, a refresh command is initiated (2) and input to a refresh counter of the semiconductor device. The refresh counter then determines a row address to be refreshed (4), the address generator generates the address to be refreshed (6) and the memory cell associated with the address is refreshed (8).
In more detail, the refresh operation is performed by turning on a word line of a DRAM memory cell array, which corresponds to a row address, with a high row address strobe (RAS), and activating a bit line sense amplifier connected to the row address. This operation is known as an RAS refresh operation. At this time, all the cells connected to the word line are refreshed concurrently by reading out stored data and rewriting the stored data before the stored data is lost. The refresh operation is then repeated until all the rows of the DRAM memory cell array are selected so that the entire DRAM can be refreshed.
Since data retention time is not the same in all the cells, a refresh time is determined based on the cell having the shortest retention time. Thus, the refresh operation is performed before the cell having the shortest retention time loses data. In other words, the refresh operation is performed before electrons stored in the capacitor of the memory cell having the shortest retention time are discharged. Otherwise, a refresh period may not be uniform since it becomes difficult to identify between data values of ‘1’ and ‘0’ in the memory cell.
Since many mobile electronic products such as cellular phones are battery dependent and employ dynamic memories for storing data, low power consumption, particularly that resulting from the reduction of a stand-by current used for self-refresh in a DRAM, is becoming an increasingly important design constraint. Accordingly, there is a need for reducing the power consumption of a dynamic memory employed by a mobile electronic product.